Railway signaling Solid State Interlocking SSI 

SSI Information Flow

Classification of SSI

• SSI can be classified on the basis of

–Type of Redundancy used

• Dual HW
• Dual HW with 100% stdby
• TMR
• SW redundancy

–Whether Object Controllers are provided or not

–Type of Data Programming used – Free wire or Geographical

Object Controllers

 

Types of  Yard Data Programming

2 Ways of Yard Data Programming:

–Free Wire Programming &

–Geographical Programming

 

Free Wire Programming

• Both – Interlocking Rules as well as Yard Specific data entered.
• Cumbersome but Flexible

 

Architecture Geographical Programming

• Interlocking rules embedded into the executive software
• Only Selection table fed into the SSI
• First time, time consuming
• Later, adapting to any station – easy
• Change of Interlocking rules or Practice – Executive SW to be changed

 

Various designs of SSI based on Different Architectures

 

Single Hardware Architecture

1	Microlok	US & S
2	VPI (Vital Processor Interlocking)	ALSTOM
3	ASCV	ALSTOM
4	VHLC	GE Transportation (Formerly Harmon)

 

2/2 Systems

1	EBILOCK 850	Bombardier Transportation
2	EBILOCK 950	-do-
3	ESA 11	AZD Praha (Czeck)
4	ESA 12	-do-
5.	SICAS S5	Siemens AG
6	SAFELOCK (RDSO)	Alstom
7	CGL SSI (RDSO)	CGL

 

2/3 TMR

1	SIMIS W	Siemens AG
2	SSI	Alstom
3	ESTW L90	Alcatel
4	SICAS	Siemens AG

 

Features of Various SSI Systems

Microlok II

HW	Single (Hot Stdby by using 2 Systems)
SW	Diverse (Partial)
Object Ctrlr	No
Validation	HW – MIL Std, SW – 3rd Party by TUV to CENELEC Std.
Data pgming	Free wire
Approx Cost	50 – 70 Lakhs
Remarks

VPI (Alstom)

HW	Single Processor
SW	Diverse (Partial)
Object Ctrlr	No
Validation	Developed to ORE Std.Approved by London Underground
Data pgming	Free wire
Working	Since 1980s

 

ASCV (Alstom)

HW	Single Processor (With Stdby Proc)
SW	Diverse (Partial)
Object Ctrlr	YES
Validation	Details not available
Data pgming	Free wire

 

EBILOCK 950 (Bombardier Sweden)

HW	2/2 – (100% Stdby for main and commn. Processors)
SW	Diverse
Object Ctrlr	YES (2/2, No Stdby)
Validation	Validated to Cenelec 126, 128, 129
Data pgming	Both Geographical & Free wire

 

ESA 11 (AZD Praha)

HW	2/2 (With Hot Stdby Processors)
SW	Diverse
Capacity	10-12 Lines (3-4 Way Stns)
Object Ctrlr	YES 2/2 Architecture
Validation	To Cenelec Stds

SIMIS (Siemens)

HW	2/3 With common I/O
SW	Common
Object Ctrlr	YES
Validation	Data not avl
Data pgming	Geographical

 

SICAS (Siemens) (Siemens Comp Aided Sigg)

HW	2/3 With common I/O
SW	Common
Object Ctrlr	Data Not Available
Validation	To Cenelec SIL 4
Data pgming	Geographical
Capacity	3-4 Lines
	Upto 8 systems can be connected to enhance the capacity
Installed	Germany, China, Korea & Thailand

 

SSI (Alstom)

HW	3-Feb
SW	Single
Capacity	6-7 Line (504 I/P, 504 O/p)
Direct Drive	Yes (Signals-128, Points-64)
Object Ctrlr	YES (2/2 HW)
Validation	To Cenelec by BR
Data pgming	Geographical
Installations	More than 280

RDSO Design

HW	2/2 (100% Stdby Possible)
SW	Common/Diverse
Object Ctrlr	No
Validation	Validation by RDSO
Data pgming	Alstom – Geographical CGL – Free Wire
Approx Cost	Rs.25 Lakhs + Relays
Installations	4 (1st installation 1995)

RDSO Type SSI Architecture

• Microprocessor Interfacing – General
• SSI Architecture:

–CPU, Read, Comparator, Relay Driver, WD

• See-saw Operation
• Self Checks:

–Signature, Data Loop, Toggle, Read backs, Memory check – RAM & EPROM

• Shut down through WD Timer

 

Circuits

• Common Interface Circuit
• Read I/P
• Comparator
• Relay Driver
• WD